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Table of Contents

Power Management Design for PLLs

Phase-locked loops are typically used to provide local oscillators in radio receivers and transmitters, for clock-signal distribution and noise reduction, and as the clock source for high-speed A/D and D/A converters. As PLL noise decreases, the impact of power supply noise increases, and can even limit noise performance in some cases. This article considers basic PLLs and the power-management requirements for each PLL building block.

Insight into digiPOT Specifications and Architecture Enhances AC Performance

Digital potentiometers provide a convenient way to adjust the output of sensors, power supplies, or other devices that require calibration. Digital setting avoids problems associated with mechanical pots, such as physical size, mechanical wear out, wiper contamination, resistance drift, and sensitivity to environmental effects—and eliminates layout inflexibility resulting from the need for access.

Differential Interfaces Improve Performance in RF Transceiver Designs

Traditional IF and RF transceivers use 50-Ω single-ended interfaces, with interconnected circuits all seeing matching input and output impedances. In modern transceiver designs, differential interfaces provide better performance, but their implementation requires designers to confront impedance matching, common-mode voltage matching, and difficult gain calculations. This article offers some assistance.

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